PIC18F67J11T-I Datasheet, PDF (387/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
TSTFSZ
Test f, Skip if 0
Syntax:
TSTFSZ f {,a}
Operands:
Operation:
0  f  255
a  [0,1]
skip if f = 0
Status Affected:
None
Encoding:
0110 011a ffff ffff
Description:
If ‘f’ = 0, the next instruction fetched
during the current instruction execution
is discarded and a NOP is executed,
making this a two-cycle instruction.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
Words:
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
Cycles:
1(2)
Note: 3 cycles if skip and followed
by a 2-word instruction.
Q Cycle Activity:
Q1
Q2
Q3
Decode
Read
register ‘f’
Process
Data
If skip:
Q1
Q2
Q3
No
operation
No
operation
No
operation
If skip and followed by 2-word instruction:
Q1
Q2
Q3
No
operation
No
operation
No
operation
No
operation
No
operation
No
operation
Q4
No
operation
Q4
No
operation
Q4
No
operation
No
operation
Example:
HERE
NZERO
ZERO
TSTFSZ CNT, 1
:
:
Before Instruction
PC
=
After Instruction
If CNT
=
PC
=
If CNT

PC
=
Address (HERE)
00h,
Address (ZERO)
00h,
Address (NZERO)
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Exclusive OR Literal with W
XORLW k
0 k 255
(W) .XOR. k W
N, Z
0000 1010 kkkk kkkk
The contents of W are XORed with
the 8-bit literal ‘k’. The result is placed
in W.
1
1
Q2
Read
literal ‘k’
Q3
Process
Data
Q4
Write to
W
Example:
XORLW
Before Instruction
W
= B5h
After Instruction
W
= 1Ah
0AFh
 2007-2012 Microchip Technology Inc.
DS39778E-page 387