PIC18F67J11T-I Datasheet, PDF (22/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
80-TQFP ^{Type Type}
Description
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/FLT0/INT0
RB0
FLT0
INT0
58
I/O TTL
Digital I/O.
I
ST
ECCP1/2/3 Fault input.
I
ST
External Interrupt 0.
RB1/INT1/PMA4
RB1
INT1
PMA4
57
I/O TTL
Digital I/O.
I
ST
External Interrupt 1.
O
—
Parallel Master Port address.
RB2/INT2/PMA3
RB2
INT2
PMA3
56
I/O TTL
Digital I/O.
I
ST
External Interrupt 2.
O
—
Parallel Master Port address.
RB3/INT3/PMA2/
ECCP2/P2A
RB3
INT3
PMA2
ECCP2⁽¹⁾
P2A⁽¹⁾
55
I/O TTL
I
ST
O
—
I/O
ST
O
—
Digital I/O.
External Interrupt 3.
Parallel Master Port address.
Capture 2 input/Compare 2 output/PWM2 output.
ECCP2 PWM Output A.
RB4/KBI0/PMA1
RB4
KBI0
PMA1
54
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
—
Parallel Master Port address.
RB5/KBI1/PMA0
RB5
KBI1
PMA0
53
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
—
Parallel Master Port address.
RB6/KBI2/PGC
RB6
KBI2
PGC
52
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP™ programming clock pin.
RB7/KBI3/PGD
RB7
KBI3
PGD
47
I/O TTL
Digital I/O.
I
TTL
Interrupt-on-change pin.
I/O
ST
In-Circuit Debugger and ICSP programming data pin.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
I²C = ST with I²C™ or SMB levels
OD = Open-Drain (no P diode to VDD)
Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).
DS39778E-page 22
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