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PIC18F67J11T-I Datasheet, PDF (252/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers
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PIC18F87J11 FAMILY
REGISTER 20-6: SSPxCON2: MSSPx CONTROL REGISTER 2 (I2C™ SLAVE MODE)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
GCEN
ACKSTAT ADMSK5 ADMSK4 ADMSK3 ADMSK2 ADMSK1
bit 7
R/W-0
SEN(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-2
bit 1
bit 0
GCEN: General Call Enable bit
1 = Enables interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address is disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK5:ADMSK2: Slave Address Mask Select bits (5-Bit Address Masking mode)
1 = Masking of the corresponding bits of SSPxADD is enabled
0 = Masking of the corresponding bits of SSPxADD is disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPxADD<1> only is enabled
0 = Masking of SSPxADD<1> only is disabled
In 10-Bit Addressing mode:
1 = Masking of SSPxADD<1:0> is enabled
0 = Masking of SSPxADD<1:0> is disabled
SEN: Stretch Enable bit(1)
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
Note 1: If the I2C module is active, this bit may not be set (no spooling) and the SSPxBUF may not be written (or
writes to the SSPxBUF are disabled).
REGISTER 20-7: SSPxMSK: MSSPx I2C™ SLAVE ADDRESS MASK REGISTER
(7-BIT MASKING MODE)(1)
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
bit 7
R/W-1
MSK0(2)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
MSK<7:0>: Slave Address Mask Select bit(2)
1 = Masking of the corresponding bit of SSPxADD is enabled
0 = Masking of the corresponding bit of SSPxADD is disabled
Note 1: This register shares the same SFR address as SSPxADD and is only addressable in select MSSPx
operating modes. See Section 20.4.3.4 “7-Bit Address Masking Mode” for more details.
2: MSK0 is not used as a mask bit in 7-bit addressing.
DS39778E-page 252
 2007-2012 Microchip Technology Inc.
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