PIC18F67J11T-I Datasheet, PDF (223/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

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19.2 Capture and Compare Modes
Except for the operation of the Special Event Trigger
discussed below, the Capture and Compare modes of
the ECCP module are identical in operation to that of
CCP4. These are discussed in detail in Section 18.2
“Capture Mode” and Section 18.3 “Compare
Mode”.
19.2.1 SPECIAL EVENT TRIGGER
ECCP1 and ECCP2 incorporate an internal hardware
trigger that is generated in Compare mode on a match
between the CCPRx register pair and the selected
timer. This can be used in turn to initiate an action. This
mode is selected by setting CCPxCON<3:0> to ‘1011’.
The Special Event Trigger output of either ECCP1 or
ECCP2 resets the TMR1 or TMR3 register pair, depend-
ing on which timer resource is currently selected. This
allows the CCPRx register pair to effectively be a 16-bit
programmable period register for Timer1 or Timer3. In
addition, the ECCP2 Special Event Trigger will also start
an A/D conversion if the A/D module is enabled.
Special Event Triggers are not implemented for
ECCP3, CCP4 or CCP5. Selecting the Special Event
Trigger mode for these modules has the same effect as
selecting the Compare with Software Interrupt mode
(CCPxM<3:0> = 1010).
Note:
The Special Event Trigger from ECCP2
will not set the Timer1 or Timer3 interrupt
flag bits.
19.3 Standard PWM Mode
When configured in Single Output mode, the ECCP
module functions identically to the standard CCP
module in PWM mode, as described in Section 18.4
“PWM Mode”. This is also sometimes referred to as
“Compatible CCP” mode as in Tables 19-1
through 19-3.
Note:
When setting up single output PWM oper-
ations, users are free to use either of the
processes described in Section 18.4.3
“Setup for PWM Operation” or
Section 19.4.9 “Setup for PWM Opera-
tion”. The latter is more generic but will
work for either single or multi-output PWM.
 2007-2012 Microchip Technology Inc.
DS39778E-page 223