LTC3882_15 Datasheet, PDF (96/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management

LTC3882
PMBus COMMAND DETAILS (Fault Response and Communication)
SMBALERT_MASK
The SMBALERT_MASK command can be used to prevent a particular status bit or bits from asserting ALERT as they
are asserted.
Figure 51 shows an example of the Write Word format used to set an ALERT mask, in this case without PEC. The bits
in the mask byte align with bits in the specified status register. For example, if the STATUS_TEMPERATURE command
code is sent in the first data byte, and the mask byte contains 0x40, then a subsequent External Overtemperature Warn-
ing would still set bit 6 of STATUS_TEMPERATURE but not assert ALERT. All other supported STATUS_TEMPERATURE
bits would continue to assert ALERT if set.
1
7
11
8
1
8
1
8
11
S
SLAVE
ADDRESS
W
A
SMBALERT_MASK
COMMAND CODE
A
STATUS_x
COMMAND CODE
A
MASK BYTE
AP
3882 F51
Figure 51. Example of Setting SMBALERT_MASK
Figure 52 shows an example of the Block Write – Block Read Process Call protocol used to read back the present state
of any supported status register, again without PEC.
1
7
11
8
1
8
1
8
1
S
SLAVE
ADDRESS
W
A
SMBALERT_MASK
COMMAND CODE
A
BLOCK COUNT
(= 1)
A
STATUS_x
COMMAND CODE
A
…
1
7
11
8
1
8
11
Sr
SLAVE
ADDRESS
RA
BLOCK COUNT
(= 1)
A
MASK BYTE NA P
3882 F52
Figure 52. Example of Reading SMBALERT_MASK
SMBALERT_MASK cannot be applied to STATUS_BYTE, STATUS_WORD, MFR_COMMON or MFR_PADS_LTC3882.
Factory default masking for applicable status registers is shown below. Providing an unsupported command code to
SMBALERT_MASK will generate a CML for Invalid/Unsupported Data.
SMBALERT_MASK Default Setting: (Refer Also to Figure 2)
STATUS RESISTER ALERT Mask Value MASKED BITS
STATUS_VOUT
0x00
None
STATUS_IOUT
0x00
None
STATUS_TEMPERATURE
0x00
None
STATUS_CML
0x00
None
STATUS_INPUT
0x00
None
STATUS_MFR_SPECIFIC
0x11
Bit 4 (internal PLL unlocked), bit 0 (GPIO low)
3882f
96
For more information www.linear.com/LTC3882