LTC3882_15 Datasheet, PDF (24/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management

LTC3882
OPERATION
an OC remains within the specified time, fault response is
determined by the value of TON_MAX_FAULT_RESPONSE.
An internal watchdog detects if SHARE_CLK remains low for
more than 64µs. The part then actively holds SHARE_CLK
low for 120ms, ensuring all devices connected to this
shared control observe a minimum RETRY_DELAY event.
The LTC3882 sets the SHARE_CLK_LOW bit in MFR_COM-
MON to indicate this fault condition.
External Faults
There are no hardware-level responses to any external
faults propagated into the IC through the GPIOn pins.
Fault Handling
Higher-level input and output fault event handling (re-
sponse) can be programmed as described in the follow-
ing PMBus Command Details section. For most faults,
the LTC3882 can manage response in one of three ways:
ignore, autonomous recovery (hiccup), or latch off. The
device takes no additional action beyond previously dis-
cussed hardware-level responses when programmed to
ignore a fault.
For autonomous recovery a new soft-start is attempted if
the fault condition is not present after the MFR_RETRY_
DELAY interval has elapsed. MFR_RETRY_DELAY can be
set from 120ms to 83 seconds in 1ms increments. If the
fault persists, the controller will continue to retry with an
interval specified by the MFR_RETRY_DELAY command.
This avoids damage to external regulator components
caused by repetitive, rapid power cycling.
No retry is attempted for a latch off fault response. In the
latch off state the gate drivers for the external MOSFETs
are immediately disabled to stop the transfer of energy
to the load as quickly as possible. The output remains
disabled until the channel is commanded off and then
on, or IC supply power is cycled. Commanding a PWM
channel off and on may require software and/or hardware
intervention depending on its programmed configuration.
The RUN pin must be released by any controlling external
application circuits for that channel to restart from the latch
off state. As the RUN pin for a given channel rises, associ-
ated internal fault indications are cleared automatically. The
LTC3882 can also be programmed to clear faults for both
outputs based solely on the RUN voltage of just one chan-
nel. See the MFR_CONFIG_ALL_LTC3882 command. The
CLEAR_FAULTS PMBus command can also be used to clear
all fault bits at any time, independent of PWM channel state.
Handling of some internally generated faults can be digitally
deglitched. See Table 12. External faults propagated into
the chip using GPIOn pins are not deglitched. Refer to the
following section on GPIO functions.
Status Registers and ALERT Masking
Figure 2 summarizes the internal LTC3882 status reg-
isters accessible by PMBus command. These contain
indication of various faults, warnings and other important
operating conditions. As shown, the STATUS_BYTE and
STATUS_WORD commands also summarize contents of
other status registers. Refer to PMBus Command Details
for specific information.
NONE OF THE ABOVE in STATUS_BYTE indicates that
one or more of the bits in the most-significant nibble of
STATUS_WORD are also set.
In general, any asserted bit in a STATUS_x register also
pulls the ALERT pin low. Once set, ALERT will remain low
until one of the following occurs.
• A CLEAR_FAULTS, RESTORE_USER_ALL or MFR_RE-
SET Command Is Issued
• The Related Status Bit Is Written to a One
• The Faulted Channel Is Properly Commanded Off and
Back On
• The LTC3882 Successfully Transmits Its Address During
a PMBus Alert Response Address (ARA)
• IC Supply Power Is Cycled
With some exceptions, the SMBALERT_MASK command
can be used to prevent the LTC3882 from asserting
ALERT for bits in these registers on a bit-by-bit basis.
These mask settings are promoted to STATUS_WORD
and STATUS_BYTE in the same fashion as the status bits
themselves. For example, if ALERT is masked for all bits
in Channel 0 STATUS_VOUT, then ALERT is effectively
masked for the VOUT bit in STATUS_WORD for PAGE 0.
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