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LTC3882_15 Datasheet, PDF (49/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management
LTC3882
APPLICATIONS INFORMATION
inductance. For example, Figure 27 illustrates the voltage
waveform across a 2mΩ resistor with a 2010 footprint.
The waveform is the superposition of a purely resistive
component and a purely inductive component. If the
RC time constant is chosen to be close to the parasitic
inductance divided by the sense resistor (L/R), the re-
sultant waveform looks resistive, as shown in Figure 28.
VRSENSE
20mV/DIV
VESL(STEP)
Output Voltage Sensing
Accurate Kelvin sensing techniques should be used to con-
nect the output voltage differentially back to the LTC3882
VSENSE± pins of the master channel for the best output
voltage regulation at the point of load. The GND paddle
of the LTC3882 serves as the negative sense point for the
Channel 1 output. These pins also provide the ADC inputs
for output voltage telemetry. While these considerations
may or may not be important for slave channels, VOUT must
be connected back to the slave channel VSENSE pin(s) in
order for the IOUT telemetry of those phases to be accurate.
So in general, sound Kelvin VOUT sensing techniques for
all LTC3882 channels is recommended.
Soft-Start and Stop
500ns/DIV
3882 F27
Figure 27. Voltage Measured Directly Across RSENSE
The LTC3882 uses digital ramp control to create both
soft-start and soft-stop.
The LTC3882 must enter the run state prior to soft-start. The
RUN pins are released after the part initializes and VINSNS
is determined to be greater than the VIN_ON threshold.
VISENSE
20mV/DIV
500ns/DIV
3882 F28
Figure 28. Voltage Measured at ISENSE Pins
For applications using low maximum sense voltages,
check the sense resistor manufacturer’s data sheet for
information about parasitic inductance. In the absence of
data, measure the voltage drop directly across the sense
resistor to extract the magnitude of the ESL step and the
following equation to determine the ESL.
Once in the run state, soft-start is performed after any
additional prescribed delay (next section) by actively
regulating the load voltage while digitally ramping the
target voltage from 0V to the commanded voltage set
point. Rise time of the voltage ramp can be programmed
using the TON_RISE command to minimize inrush currents
associated with start-up voltage ramp. The maximum rate
at which the LTC3882 can move the output in this fashion
is 100µs/step. Soft-start is disabled by setting TON_ RISE
to any value less than 0.250ms. The LTC3882 will perform
the necessary math internally to assure the voltage ramp
is controlled to the desired slope. However, the voltage
slope cannot be any faster than the fundamental limits of
the power stage. The smaller TON_RISE becomes, the
more noticeable an output voltage stair-step may become.
ESL = VESL(STEP) • tON • tOFF
∆IL
tON + tOFF
If low value (<5mΩ) sense resistors are used, verify that
the signal across CF resembles the current through the
inductor, and reduce RF to eliminate any large step associ-
ated with the turn-on of the primary switch.
The LTC3882 also supports soft turn off in the same man-
ner it controls turn on. TOFF_FALL is processed when
the RUN pin goes low or if the part is commanded off.
If the part faults off or GPIO is pulled low and the part
is programmed to respond to this, the PWM instantly
commands the output off. The output will then decay as
a function of load current.
3882f
For more information www.linear.com/LTC3882
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