LTC3882_15 Datasheet, PDF (50/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management

LTC3882
APPLICATIONS INFORMATION
The LTC3882 can produce a controlled ramp off as long
as the power stage is configured to run in CCM and the
TOFF_FALL time is sufficiently slow that the power stage
can achieve the desired slope. The TOFF_FALL time can
only be met if the power stage can sink sufficient current
under closed loop control to assure the output is at 0V
by the end of the fall time. If TOFF_FALL is shorter than
the time required to discharge the load capacitance, the
output will not reach 0V. In this case, the power stage will
still be commanded off at the end of TOFF_FALL and V_OUT
will decay at a rate determined by the load. If the control-
ler is set to run DCM, the controller will not pull negative
current and the output will only be pulled low by the load,
not the power stage. The maximum fall time is limited to
1.3 seconds. The smaller TOFF_FALL becomes, the more
noticeable an output voltage stair-step may become.
Time-Based Output Sequencing and Ramping
The LTC3882 TON_DELAY and TOFF_DELAY commands
can be used in combination with the rise and fall time com-
mands covered in the previous section to implement a wide
range of versatile sequencing and ramping schemes. The
key to time-based sequencing and ramping is the ability
of LTC3882 master phases to move their outputs up and
down according to PMBus command values as shown in
Figure 29 and Figure 30.
There is a fixed delay and other timing uncertainty associ-
ated with all changes in output voltage controlled by the
LTC3882. A nominal fixed timing delay of 270µs exists to
process any change in output voltage, including soft start/
stop, margining and general changes in VOUT_COMMAND
value. The start of all time-based output operations occur
with an uncertainty of ±50µs and have a nominal step reso-
lution of 100µs. This means the minimum TON_DELAY or
TOFF_DELAY that the LTC3882 can produce will range from
220µs to 320µs, not including basic oscillator tolerances.
For software-based output changes (e.g., margining), this
algorithmic delay begins when the STOP bit is received
on the serial bus. An example of this minimum turn on/
off delay and step-wise output control can be seen in
Figure 31, where TON_DELAY = 0s and TON_RISE = 1ms.
To effectively implement tracking and sequencing between
rails controlled by LTC digital power products, two signals
RUN
DIGITAL SERVO
MODE ENABLED _{FINAL OUTPUT}
VOLTAGE REACHED
TON_MAX_FAULT_LIMIT
VOUT_UV_FAULT_LIMIT
V_OUT
DAC VOLTAGE
ERROR (NOT
TO SCALE)
TIME DELAY OF
<1mS, TYPICAL
TON_DELAY
TON_RISE
TIME
3882 F29
Figure 29. Time-Based V_OUT Turn-On
RUN
V_OUT
TOFF_DELAY
TOFF_FALL
TIME
3882 F30
Figure 30. Time-Based V_OUT Turn-Off
should be shared between all controlling ICs: SHARE_CLK
and RUN (CONTROL pin on LTC297x products). This fa-
cilitates synchronized rail sequencing on or off based on
shared input supply state (VIN_ON threshold), external
hardware control (RUN pin), or PMBus commands (pos-
sibly using global addressing).
Figure 32 shows an example of output supply sequencing
using TON_DELAY.
Using this scheme, conventional coincident and ratiometric
tracking can also be emulated by setting equivalent turn-
on/off delays and appropriate rise and fall times as shown
in Figure 33 and Figure 34.
In addition, these schemes can easily be mixed and matched
to create any necessary ramping controls, some of which
might prove difficult to implement with conventional
analog-only controllers. These programmable features
3882f
50
For more information www.linear.com/LTC3882