LTC3882_15 Datasheet, PDF (19/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management

LTC3882
OPERATION
draw current from the load and fall time will be set by
output capacitance and load current.
Finally, each PWM channel can be commanded off by
pulling the associated RUN pin low. Pulling the RUN pin
low can force the channel to perform a controlled turn off
or immediately disable the power stage, depending on the
programming of the ON_OFF_CONFIG command.
Minimum Output Disable Times
When a PMBus OPERATION command is used to turn off
an LTC3882 channel, a minimum output disable time of
120ms is imposed regardless of how quickly the channel
is commanded back on. If bit 4 of MFR_CHAN_CONFIG is
clear, a PMBus command to turn the channel off also pulses
the RUN pin low. Once the RUN pin is pulled low internally
or externally, a minimum output disable time (RUN forced
low) of TOFF_DELAY + TOFF_FALL + 136ms is enforced.
If MFR_RESTART_DELAY is greater than this mandatory
minimum, the larger value of MFR_RESTART_DELAY is
used. In either case the LTC3882 holds its own RUN pin
low during the entire disable period. These minimum
off times allow a consistent channel restart with coher-
ent monitor ADC values and make the LTC3882 highly
compatible with other LTC PMBus digital power system
management products.
Output Short Cycle
An output short cycle condition is created when a master
channel is commanded back on while waiting for TOFF_DE-
LAY or TOFF_FALL to expire. Any time this occurs, the
LTC3882 asserts the Short Cycle bit in STATUS_MFR_SPE-
CIFIC. Device response at that point is governed by bits
in MFR_CHAN_CONFIG_LTC3882 and SMBALERT_MASK.
Refer to the detailed descriptions of those commands
for additional details. Generally, the LTC3882 should be
controlled so that short cycle conditions are not created
during normal operation.
Light Load Current Operation
In DCM, the inductor current is not allowed to reverse.
The reverse current comparator I_REV disables the external
bottom MOSFET (synchronous rectifier) when the inductor
current reaches approximately 0A, preventing it from going
substantially negative. The LTC3882 can be programmed to
disable the bottom NFET by putting the PWM output into
high impedance, deasserting the EN output, or driving the
BG output low. PWM control protocol selection depends
on the requirements of the external gate driver or power
block, which must have short delays to a high impedance
output, relative to the PWM cycle, to support DCM.
Efficiency at light loads in CCM is lower than in DCM.
Continuous conduction mode exhibits less interference
with audio circuitry but may result in reverse inductor
current, for instance at light loads or under large transient
conditions.
Switching Frequency and Phase
There is a high degree of flexibility for setting the PWM op-
erating frequency of the LTC3882. The switching frequency
of the PWM can be established with an internal oscillator
or an external time base. The internal phase-locked loop
(PLL) synchronizes PWM control to this timing reference
with proper phase relation, whether the clock is provided
internally or externally. The device can also be configured to
provide the master clock to other ICs through PMBus com-
mand, EEPROM setting, or external configuration resistors
as outlined in application Table 10. For PMbus or EEPROM
configuration, the LTC3882 is designated as a clock master
by clearing bit 4 of MFR_CONFIG_ALL_LTC3882. As clock
master, the LTC3882 will drive its open-drain SYNC pin at
the selected rate with a pulse width of 125ns. An external
pull-up resistor between SYNC and V_DD33 is required in
this case. Only one device connected to SYNC should be
designated to drive the pin. If more than one LTC3882
sharing SYNC is programmed as clock master, just one of
the devices is automatically elected to provide the clock.
The others disable their SYNC outputs and indicate this
with bit 10 of MFR_PADS_LTC3882.
The LTC3882 has two modes of PWM operation: discon-
tinuous conduction mode (DCM) and forced continuous
conduction mode (CCM). Mode selection is made with
the MFR_PWM_MODE command.
The LTC3882 will automatically accept an external SYNC
input, disabling is own SYNC drive if necessary, as long
as the external clock frequency is greater than 1/2 of the
programmed internal oscillator. Whether configured to drive
SYNC or not, the LTC3882 can continue PWM operation
3882f
For more information www.linear.com/LTC3882
19