LTC3882_15 Datasheet, PDF (56/104 Pages) Linear Technology – Dual Output PolyPhase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management

LTC3882
APPLICATIONS INFORMATION
It is necessary to properly connect V_SENSE+ on a slave
phase for accurate I_OUT telemetry, even though slave phases
do use need this information for PWM control. While not
strictly required, the V_SENSE± lines of slave phases can
simply share with the master to provide additional output
voltage telemetry. If the only concern is accurate slave I_OUT
telemetry, V_SENSE+ for that channel may be locally wired
to I_SENSE–. V_SENSE– on a slave phase should always be
shorted to V_SENSE– for its master channel. I_OUT OC/ROC
function is not affected by V_SENSE± wiring.
All phases must be synchronized to the same shared SYNC
clock and should be programmed to run at the same default
PWM frequency. Phases should be selected to be evenly
spaced around a 360° phasor diagram, and all phases
on a PolyPhase rail should be selected to have the same
maximum duty cycle. Refer to details for MFR_PWM_CON-
FIG_LTC3882. Figure 38 shows an example of connections
for three phases and Figure 39 shows an example of an
8-phase rail. Additional shared signals in these figures
highlight the ability of the LTC3882 to communicate fault
status between phases and rails, perform synchronized
time-based rail sequencing and tracking and report ac-
curate output current telemetry for all phases.
Output current fault and warning limits should each be set
to the same values across all PolyPhase channels using
IOUT_FAULT_LIMIT and IOUT_WARN_LIMIT. The cor-
rect sense resistance and related temperature coefficient
should also be set for each phase (IOUT_CAL_GAIN, MFR_
IOUT_CAL_GAIN_TC) to achieve accurate I_OUT telemetry
and consistent fault handling across phases. Because the
LTC3882 current sharing loop operates by matching sensed
voltage, it is important that well-matched sense elements
be used in the system. Current matching parameters speci-
fied for the LTC3882 do not include these external sources
of error, such as inductor DCR tolerance. Programming of
V_OUT related parameters is not required for slave phases.
A PolyPhase power supply significantly reduces the amount
of ripple current in both the input and output capacitors.
The RMS input ripple current is divided by, and the ef-
fective ripple frequency is multiplied by, the number of
phases used as long as the input voltage is greater than
the number of phases used times the output voltage. The
output ripple amplitude is also reduced by the number of
phases used. Figure 40 graphically illustrates the principle.
The worst-case RMS ripple current for a single stage de-
sign peaks at an input voltage of twice the output voltage.
The worst case RMS ripple current for a 2-phase design
peaks at output voltages of 1/4 and 3/4 of the input volt-
SINGLE PHASE
DUAL PHASE
SW1 V
SW1 V
I_CIN
I_COUT
SW2 V
I_L1
I_L2
I_CIN
I_COUT
3882 F40
RIPPLE
Figure 40. Single and 2-Phase Current Waveforms
age. When the RMS current is calculated, higher effective
duty factor results and the peak current levels are divided
as long as the current in each stage is balanced. Refer to
Application Note 19 at http://www.linear.com/designtools/
app_notes for a detailed description of how to calculate
RMS current for the single stage switching regulator. Fig-
ure 41 and Figure 42 illustrate how the input and output
currents are reduced by using an additional phase. For a
2-phase converter, the input current peaks drop in half and
the frequency is doubled. The input capacitor requirement
is then theoretically reduced by a factor of four.
External Temperature Sense
The LTC3882 facilitates external measurement of the
power stage temperature of each channel with several
silicon-junction-based means. The voltage produced by
the remote sense circuit is digitized by the internal ADC,
and the computed temperature value is returned by the
paged READ_TEMPERATURE_1 telemetry command.
The most accurate external temperature measurement
can be made using a diode-connected PNP transistor
3882f
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