XP2 Datasheet, PDF (51/92 Pages) Lattice Semiconductor – LatticeXP2 Family Data Sheet

Lattice Semiconductor
DC and Switching Characteristics
LatticeXP2 Family Data Sheet
sysIO Single-Ended DC Electrical Characteristics
Over Recommended Operating Conditions
Input/Output
Standard
LVCMOS33
LVTTL33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33
SSTL33_I
SSTL33_II
SSTL25_I
V_IL
Min. (V) Max. (V)
-0.3
0.8
V_IH
Min. (V) Max. (V)
2.0
3.6
-0.3
0.8
2.0
3.6
-0.3
0.7
1.7
3.6
-0.3
0.35 V_CCIO 0.65 V_CCIO
3.6
-0.3
0.35 V_CCIO 0.65 V_CCIO
3.6
-0.3
0.35 V_CC
0.65 V_CC
3.6
-0.3
0.3 V_CCIO 0.5 V_CCIO
3.6
-0.3
V_REF - 0.2 V_REF + 0.2
3.6
-0.3
V_REF - 0.2 V_REF + 0.2
3.6
-0.3
V_REF - 0.18 V_REF + 0.18
3.6
V_OL
Max. (V)
V_OH
Min. (V)
0.4
V_CCIO - 0.4
0.2
V_CCIO - 0.2
0.4
V_CCIO - 0.4
0.2
V_CCIO - 0.2
0.4
V_CCIO - 0.4
0.2
V_CCIO - 0.2
0.4
V_CCIO - 0.4
0.2
0.4
0.2
0.4
0.2
0.1 V_CCIO
0.7
0.5
V_CCIO - 0.2
V_CCIO - 0.4
V_CCIO - 0.2
V_CCIO - 0.4
V_CCIO - 0.2
0.9 V_CCIO
V_CCIO - 1.1
V_CCIO - 0.9
0.54 V_CCIO - 0.62
I_OL¹ (mA)
20, 16,
12, 8, 4
0.1
20, 16,
12, 8, 4
0.1
20, 16,
12, 8, 4
0.1
16, 12,
8, 4
0.1
8, 4
0.1
6, 2
0.1
1.5
8
16
7.6
12
I_OH¹ (mA)
-20, -16,
-12, -8, -4
-0.1
-20, -16,
-12, -8, -4
-0.1
-20, -16,
-12, -8, -4
-0.1
-16, -12,
-8, -4
-0.1
-8, -4
-0.1
-6, -2
-0.1
-0.5
-8
-16
-7.6
-12
SSTL25_II
-0.3
V_REF - 0.18 V_REF + 0.18
3.6
0.35 V_CCIO - 0.43
15.2
20
-15.2
-20
SSTL18_I
-0.3
V_REF - 0.125 V_REF + 0.125
3.6
0.4
V_CCIO - 0.4
6.7
-6.7
8
-8
SSTL18_II
-0.3
V_REF - 0.125 V_REF + 0.125
3.6
0.28 V_CCIO - 0.28
11
-11
4
-4
HSTL15_I
-0.3
V_REF - 0.1 V_REF + 0.1
3.6
0.4
V_CCIO - 0.4
8
-8
8
-8
HSTL18_I
-0.3
V_REF - 0.1 V_REF + 0.1
3.6
0.4
V_CCIO - 0.4
12
-12
HSTL18_II
-0.3
V_REF - 0.1 V_REF + 0.1
3.6
0.4
V_CCIO - 0.4
16
-16
1. The average DC current drawn by I/Os between GND connections, or between the last GND in an I/O bank and the end of an I/O bank, as
shown in the logic signal connections table shall not exceed n * 8mA, where n is the number of I/Os between bank GND connections or
between the last GND in a bank and the end of a bank.
3-7