HYB25D512800BT Datasheet, PDF (86/90 Pages) Infineon Technologies AG – 512Mbit Double Data Rate SDRAM

HYB25D512[40/16/80]0B[E/F/C/T]
512Mbit Double Data Rate SDRAM
System Characteristics for DDR SDRAMs
Table 25 Output Slew Rate Characteristrics (×4, ×8 Devices only)
Slew Rate Characteristic Typical Range (V/ns) Minumum (V/ns)
Pullup Slew Rate
1.2 – 2.5
1.0
Pulldown Slew Rate
1.2 – 2.5
1.0
Maximum (V/ns)
4.5
4.5
Notes
1)2)3)4)5)6)
2)3)4)5)5)7)2)2)
1) Pullup slew rate is characterized under the test conditions as shown in Figure 52
2) Pullup slew rate is measured between (V_DDQ/2 – 320 mV ± 250 mV)
Pulldown slew rate is measured between (V_DDQ/2 + 320 mV ± 250 mV)
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one
output switching.
Example: For typical slew rate, DQ0 is switching
For minimum slew rate, all DQ bits are switchiung worst case pattern
For maximum slew rate, only one DQ is switching from either high to low, or low to high.
the remainig DQ bits remain the same as previous state.
3) Evaluation conditions
Typical: 25 °C (T Ambient), V_DDQ = nominal, typical process
Minimum: 70 °C (T Ambient), V_DDQ = minimum, slow – slow process
Maximum: 0 °C (T Ambient), V_DDQ = maximum, fast – fast process
4) Verified under typical conditions for qualification purposes.
5) TSOP II package devices only.
6) Only intended for operation up to 266 Mbps per pin.
7) Pulldown slew rate is measured under the test conditions shown in Figure 53.
Table 26 Output Slew Rate Characteristics (×16 Devices only)
Slew Rate Characteristic Typical Range (V/ns) Minimum (V/ns)
Pullup Slew Rate
1.2 – 2.5
0.7
Pulldown Slew Rate
1.2 – 2.5
0.7
Maximum(V/ns)
5.0
5.0
Notes
1)2)3)4)5)6)
7)
1) Pullup slew rate is characterizted under the test conditions as shown in Figure 52
2) Pullup slew rate is measured between (V_DDQ/2 – 320 mV ± 250 mV)
Pulldown slew rate is measured between (V_DDQ/2 + 320 mV ± 250mV)
Pullup and Pulldown slew rate conditions are to be met for any pattern of data, including all outputs switching and only one
output switching.
Example: For typical slew rate, DQ0 is switching
For minimum slew rate, all DQ bits are switchiung worst case pattern
For maximum slew rate, only one DQ is switching from either high to low, or low to high.
the remainig DQ bits remain the same as previous state.
3) Evaluation conditions
Typical: 25 °C (T Ambient), V_DDQ = nominal, typical process
Minimum: 70 °C (T Ambient), V_DDQ = minimum, slow – slow process
Maximum: 0 °C (T Ambient), V_DDQ = maximum, fast – fast process
4) Verified under typical conditions for qualification purposes.
5) TSOP II package devices only.
6) Only intended for operation up to 266 Mbps per pin.
7) Pulldown slew rate is measured under the test conditions shown in Figure 53.
Table 27 Output Slew Rate Matching Ratio Characteristics
Slew Rate Characteristic
DDR266A
DDR266B
Parameter
Min.
Max.
Min.
Max.
Output SLew Rate Matching —
—
—
—
Ratio (Pullup to Pulldown)
Data Sheet
86
DDR200
Min.
0.71
Max.
1.4
Notes
1) 2)
Rev. 1.2, 2004-06
08122003-RMYD-6BJP