HYB25D512800BT Datasheet, PDF (42/90 Pages) Infineon Technologies AG – 512Mbit Double Data Rate SDRAM

CK
CK
Command
Address
DQS
DQ
DM
HYB25D512[40/16/80]0B[E/F/C/T]
512Mbit Double Data Rate SDRAM
Functional Description
T1
T2
Write
NOP
BA a, COL b
t_DQSS (max)
Dla-b
Maximum DQSS
T3
T4
NOP
NOP
CK
CK
Command
Address
DQS
DQ
DM
T1
T2
Write
BA a, COL b
t_DQSS (min)
NOP
Dla-b
Minimum DQSS
T3
T4
NOP
NOP
DI a-b = data in for bank a, column b.
3 subsequent elements of data in are applied in the programmed order following DI a-b.
A non-interrupted burst is shown.
A10 is Low with the Write command (Auto Precharge is disabled).
Figure 18 Write Burst (Burst Length = 4)
Don’t Care
Data Sheet
42
Rev. 1.2, 2004-06