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HYB25D512800BT Datasheet, PDF (85/90 Pages) Infineon Technologies AG – 512Mbit Double Data Rate SDRAM
HYB25D512[40/16/80]0B[E/F/C/T]
512Mbit Double Data Rate SDRAM
System Characteristics for DDR SDRAMs
7
System Characteristics for DDR SDRAMs
The following specification parameters are required in systems using DDR400, DDR333 & DDR266 devices to
ensure proper system performance. These characteristics are for system simulation purposes and are guaranteed
by design.
Table 21 Input Slew Rate for DQ, DQS, and DM
AC Characteristics
Symbol DDR400 DDR333 DDR266 Units Notes
Parameter
Min. Max. Min. Max. Min. Max.
DM/DQS inout slew rate measured berween DCSLEW 0.5 4.0
VIH(DC), VIL (DC), and VIL(DC), VIH (DC)
0.5 4.0
0.5 4.0
V/ns 1)2)
1) Pullup slew rate is characterized under the test conditions as shown in Figure 52.
2) DQS, DM, amd DQ input slew rate is specified to prevent doble clocking of data and preserve setup and hold times. Signal
transitions through the DC region must be monotonic.
Table 22 Input Setup & Hold Time Derating for Slew Rate
Input Slew Rate
∆tIS
tIH
0.5 V/ns
0
0
Units
ps
Notes
1)
0.4 V/ns
+50
0
ps
0.3 V/ns
+100
0
ps
1) A derating factor will be used to increase tIS and tIH in the case where the input slew rate is below 0.5 V/ns as
shown in Table 22. The input slew rate is based on the lesser of the slew rates determined by either VIH (AC) to
VIL (AC) or VIH (DC) to VIL (DC), similarly for rising transitions. Aderating factor applies to speed bins DDR200,
DDR266, and DDR333.
Table 23 Input/Output Setup and Hold TIme Derating for Slew Rate
I/O Input Slew Rate
∆tDS
tDH
0.5 ns/V
0
0
Units
ps
Notes
1)
0.4 ns/V
+75
+75
ps
0.3 ns/V
+100
+100
ps
1) Table 23 is used to increase tDS and tDH in the case where the I/O slew rate is below 0.5 V/ns. The I/O slew
rate is based on the lesser of the AV – AC slew rate and the DC – DC slew rate. The input slew rate is based
on the lesser of the slew rates determined by either VIH (AC) to VIL (AC) or VIH (DC) to VIL (DC), and similarly for rising
transitions. A derating factor applies to speed bins DDR200, DDR266 and DDR333.
Table 24 Input/Output Setup and Hold Derating for Rise/Fall Delta Slew Rate
Delta Slew Rate
±0.0 ns/V
±0.25 ns/V
±0.5 ns/V
∆tDS
0
+50
+100
tDH
0
+50
+100
Units
ps
ps
ps
Notes
1)
1) A derating factor will be used to increase tDS and tDH in the case where DQ, DM and DQS slew rates differ, as shown in
Tables 15 & 16. Input slew rate is based on the larger of AC – AC delta rise, fall rate and DC – DC delta rise, fall rate. Input
slew rate is based on the lesser of the slew rates determined by either VIH (AC) to VIL (AC) or VIH (DC) to VIL (DC), similarly for
rising transitions.
The delta rise/fall rate is calculated as:{1/(Slew Rate1)} – {1/(Slew Rate2)}
For example: If Slew Rate 1 is 0.5 V/ns and Slew Rate 2 is 0.4 V/ns, then the delta rise, fall rate is –0.5 ns/V. Using the
table given, this would result in the need for an increase in tDS and tDH of 100 ps. A derating factor applies to speed bins
DDR200, DDR266, and DDR333.
Data Sheet
85
Rev. 1.2, 2004-06
08122003-RMYD-6BJP