HYB25D512800BT Datasheet, PDF (14/90 Pages) Infineon Technologies AG – 512Mbit Double Data Rate SDRAM

HYB25D512[40/16/80]0B[E/F/C/T]
512Mbit Double Data Rate SDRAM
Pin Configuration
Table 3 Pin Configuration of DDR SDRAM
Ball#/Pin#
Name Pin Buffer Function
Type Type
Data Strobe ×16 organization
E3, 51
UDQS I/O
SSTL Data Strobe Upper Byte
E7, 16
LDQS I/O
Data Mask ×16 organization
F3, 47
UDM I
F7, 20
LDM
I
Power Supplies
F1, 49
A9, B2, C8,
D2, E8, 3, 9,
15, 55, 61
V_REF
V_DDQ
AI
PWR
A7, F8, M3, V_DD
M7, 1, 18, 33
PWR
A1, B8, C2, V_SSQ
D8, E2, 6, 12,
52, 58, 64
PWR
F2, 34
V_SS
Not Connected
PWR
A2, 65
NC
NC
SSTL
SSTL
SSTL
—
—
—
—
—
—
A8, 2
NC
NC
—
B1, 63
NC
NC
—
B9, 4
NC
NC
—
C1, 60
NC
NC
—
C3, 59
NC
NC
—
C7, 8
NC
NC
—
C9, 7
NC
NC
—
D1, 57
NC
NC
—
D9, 10
NC
NC
—
E1, 54
NC
NC
—
Data Strobe Lower Byte
Data Mask Upper Byte
Data Mask Lower Byte
I/O Reference Voltage
I/O Driver Power Supply
Power Supply
Power Supply
Power Supply
Not Connected
Note: ×4 organization
Not Connected
Note: ×4 organization
Not Connected
Note: ×8 and ×4 organisation
Not Connected
Note: ×8 and ×4 organization
Not Connected
Note: ×8 and ×4 organization
Not Connected
Note: ×4 organization
Not Connected
Note: ×4 organization
Not Connected
Note: ×8 and ×4 organization
Not Connected
Note: ×8 and ×4 organization
Not Connected
Note: ×8 and ×4 organization
Not Connected
Note: ×8 and ×4 organization
Data Sheet
14
Rev. 1.2, 2004-06