82P33714_17 Datasheet, PDF (42/64 Pages) Integrated Device Technology – Synchronous Equipment Timing Source for Synchronous Ethernet

82P33714 Datasheet
5.4 UART MODE
When the 82P33714 comes out of reset with the MPU_MODE[1:0]
pins set to 'b10, or when the boot-up EEPROM sets the
mpu_sel_cnfg[1:0] bits to 'b10, the device will set its serial port mode to
support simple 2-pin UART (Universal Asynchronous Receiver / Trans-
mitter) communications. The UART_RX pin is used as the receive data,
(data into the device), and the UART_TX pin is used as the transmit
data, (data out of the device). The supported byte-protocol is 1 Start bit,
8 data bits, and 1 Stop bits, with no parity. Figure 22 shows the UART
data frame.
5.4.1
PROTOCOL
Reads and writes are initiated by the micro-controller sending a com-
mand to the 82P33714. All commands start with a zero byte, followed by
a command byte, 2 address bytes, and a length byte, which specifies
the number of bytes to be written or read. Write commands then have a
number of data bytes as given by the length byte. Commands are
optionally acknowledged on completion.
Byte 1
Zero byte
Byte 2
Command byte
Byte 3
High Address byte (always zero)
Byte 4
Low Address byte
Byte 5
Length byte
Byte 6 to 5+Length Write data bytes (if a write command)
Figure 22. UART Data Frame
The falling edge of the Start bit is used to synchronize the UART
receiver with the transmitter of the micro-controller; each bit is sampled
at the expected midpoint as determined by this falling edge and the pro-
grammed baud rate.
The baud rate is programmed using the two control registers:
baud_rate_cnfg, and baud_limit_cnfg. These registers set up an M/N
divider from the 82P33714 system clock rate (77.76 MHz) down to the
desired sample-clock rate, which must be 16 times the desired baud
rate. The baud_freq_cnfg register is programmed with the M value, and
the baud_limit_cnfg register is programmed with the value (N - M).
These registers may be programmed by the boot-up EEPROM, or over
the serial UART link. The new values take effect as soon as the UART
goes idle, so it is recommended that all 4 bytes be written in one burst.
Example Baud rates:
9600 baud (default)
• Sample Clock Rate = 16 * 9600 = 153 600 Hz
• Sample Clock Rate = 77.76 MHz * 4/2025 = 153 600 Hz
• baud_freq_cnfg = 4 = x004
• baud_limit_cnfg = 2025 - 4 = 2021 = x07E5
115 200 baud
• Sample Clock Rate = 16 * 115 200 = 1 843 200 Hz
• Sample Clock Rate = 77.76 MHz * 16/675 = 1 843 200 Hz
• baud_freq_cnfg = 16 = x010
• baud_limit_cnfg = 675 - 16 = 659 = x293
Reads and writes of the 82P33714 control and status registers are
performed through a multi-frame/byte binary protocol, which is more effi-
cient than a character-oriented (hyper-terminal) protocol. The UART will
auto-increment the internal address to support burst reads and writes for
even higher efficiency.
The format of the command byte is given in Table 16.
Table 16: UART Command byte Structure
Bit Number
[7:6]
[5:4]
[3:2]
1
0
Description
Not Used
Command:
2'b00 = NOP (sends ACK if requested)
2'b01 = Read
2'b10 = Write
Not Used
Address Auto-Increment:
Set to 0 to enable address auto increment.
Set to 1 to disable address auto increment.
Send ACK Flag:
Set to 1 to send ACK byte at command completion.
Note that bursts cannot exceed the boundary of one register page
(128 bytes), also the Address + Length should not reach the page regis-
ter at the top of the register page (address 127 / x3F).
When the micro-controller sends a read command, or requests an
acknowledge byte, the 82P33714 will transmit one of more bytes as fol-
lows:
Byte 1 to Length Read Data bytes
Byte 'Length
'ACK byte (0x5A, if bit[0] of the Command byte
was set]
Although the UART command contains a two-byte address, the
82P33714 will only use the Low Address byte. The UART can be set to
expect a single byte address by clearing the uart_double_address bit in
the baud_freq_cnfg[11:8] register. The command protocol can then
leave out the High Address byte.
©2017 Integrated Device Technology, Inc.
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Revision 6, January 23, 2017