82P33714_17 Datasheet, PDF (34/64 Pages) Integrated Device Technology – Synchronous Equipment Timing Source for Synchronous Ethernet

82P33714 Datasheet
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POWER SUPPLY FILTERING TECHNIQUES
To achieve optimum jitter performance, power supply filtering is
required to minimize supply noise modulation of the output clocks. The
common sources of power supply noise are switch power supplies and
the high switching noise from the outputs to the internal PLL. The
82P33714 provides separate VDDA and VDDAO power pins for the
internal analog PLL, it also provides VDDD and VDDDO pins for the
core logic as well as I/O driver circuits.
The suggested power decoupling scheme is shown in Figure 16.
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Revision 6, January 23, 2017