82P33714_17 Datasheet, PDF (40/64 Pages) Integrated Device Technology – Synchronous Equipment Timing Source for Synchronous Ethernet

82P33714 Datasheet
5.3 SERIAL MODE
In a read operation, the active edge of SCLK is selected by CLKE.
When CLKE is asserted low, data on SDO will be clocked out on the ris-
ing edge of SCLK. When CLKE is asserted high, data on SDO will be
clocked out on the falling edge of SCLK.
In a write operation, data on SDI will be clocked in on the rising edge
of SCLK.
Figure 19. Serial Read Timing Diagram (CLKE Asserted Low)
Figure 20. Serial Read Timing Diagram (CLKE Asserted High)
©2017 Integrated Device Technology, Inc.
40
Revision 6, January 23, 2017