ICS1893Y-10 Datasheet, PDF (119/150 Pages) –

ICS1893Y-10 - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-7. MAC/Repeater Interface Pins: 10M Serial Interface (Continued)
MII Pin 100M Pin
Name Symbol No.
Pin
Name
Pin
Type
Pin Description
RXDV
10RXDV 36
Output
10M (Serial Interface) Receive Data Valid.
The ICS1893Y-10 asserts 10RXDV to indicate to the
MAC/repeater that data is available on the MII Receive Bus
(RXD[3:0]). The ICS1893Y-10:
• Asserts 10RXDV after it detects and recovers the
Start-of-Stream delimiter, /J/K/. (For the timing reference,
see Chapter 9.5.6, “MII / 100M Stream Interface:
Synchronous Receive Timing”.)
• De-asserts 10RXDV after it detects either the End-of-Stream
delimiter (/T/R/) or a signal error.
Note: 10RXDV is synchronous with the Receive Data Clock,
10RCLK.
RXER –
39
No Receive Error.
connect For the 10M Serial Interface, this pin is a no connect. For more
information, see Table 5-2.
RXTRI
41 Input Receive (Interface), Tri-State.
• The input on this pin is from a MAC. When the signal on this
pin is logic:
– Low, the MAC indicates that it is not in a tri-state condition.
– High, the MAC indicates that it is in a tri-state condition. In
this case, the ICS1893Y-10 acts to ensure that only one
PHY is active at a time.
• If the PHY address is 00, the ICS1893Y-10 acts as if the
RX-TRI pin is held high.
TXCLK 10TCLK 43 Output 10M (Serial Interface) Transmit Clock.
This pin’s description is the same as that given in Table 8-5.
TXD0
TXD1,
TXD2,
TXD3
TXEN
TXER
10TD
45 Input 10M (Serial Interface) Transmit Data.
This pin’s description is the same as that given in Table 8-5.
–
46,
No Transmit Data 1–3.
47, connect For the 10M Serial Interface, these pins are a no connect. For
48
more information, see Table 5-2.
10TXEN 44
Input 10M (Serial Interface) Transmit Enable.
This pin’s description is the same as that given in Table 8-5.
–
42
No Transmit Error.
connect For the 10M Serial Interface, this pin is a no connect. For more
information, see Table 5-2.
ICS1893Y-10 Rev F 1/20/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
119
January, 2004