ICS1893Y-10 Datasheet, PDF (117/150 Pages) –

ICS1893Y-10 - Release
Chapter 8 Pin Diagram, Listings, and Descriptions
Table 8-6. MAC/Repeater Interface Pins: 100M Symbol Interface (Continued)
MII Pin 100M Pin
Name Symbol No.
Pin
Name
Pin
Type
Pin Description
RXD0,
RXD1,
RXD2,
RXD3
SRD0,
SRD1,
SRD2,
SRD3
35, Output Symbol Receive Data 0–3.
34,
In 100M Symbol mode:
33,
• The ICS1893Y-10’s SRD0 pin transmits the least-significant
32
bit and the SRD4 pin transmits the most-significant bit of the
symbol received from its MAC/Repeater interface.
• The ICS1893Y-10 continually transfers the data it receives
from its MDI to its SRD[4:0] pins (that is, to its MAC/Repeater
Interface). In the 100M Symbol mode, data is not framed.
Therefore, the ICS1893Y-10 does not assert its RXDV
signal.
• The ICS1893Y-10 transfers its receive data to the SRD[4:0]
pins synchronously on the rising edges of its SRCLK signal.
RXDV –
RXER SRD4
RXTRI
TXCLK STCLK
TXD0–3
STD0,
STD1,
STD2,
STD3
TXEN –
TXER STD4
Note: The signal on the ICS1893Y-10’s SRD[3:0] pins are
conditioned by the RXTRI pin.
36
No Receive Data Valid.
Connect For the 100M Symbol Interface, this pin is a no connect. For
more information, see Table 5-1.
39 Output Symbol Receive Data 4.
This pin’s description is the same as that given in Table 8-5.
41 Input Receive (Interface), Tri-State.
This pin’s input is from a MAC. When this pin’s signal is logic:
• Low, the MAC indicates it is not in a tri-state condition.
• High, the MAC indicates it is in a tri-state condition. In this
case, the ICS1893Y-10 acts to ensure that only one PHY is
active at a time. (A PHY address of 00 also tri-states the MII
interface.)
43 Output Symbol Transmit Clock.
This pin’s description is the same as that given in Table 8-5.
45, Input Symbol Transmit Data 0–3.
46,
In 100M Symbol mode:
47,
• The ICS1893Y-10 STD0 pin receives the least-significant bit
48
and the STD4 pin receives the most-significant bit of the
symbol received from the MAC/Repeater interface.
• The signals on the ICS1893Y-10 STD[4:0] pins are
continually and synchronously sampled on the rising edges
of its STCLK. These signals are independent of the TXEN
signal.
Note: In 100M Symbol mode, TXEN is not used because the
MAC/Repeater is responsible for sending both IDLE
symbols and data.
44
No Transmit Enable.
Connect For the 100M Symbol Interface, this pin is a no connect. For
more information, see Table 5-1.
42 Input Symbol Transmit Data 4.
This pin’s description is the same as that given in Table 8-5.
ICS1893Y-10 Rev F 1/20/04
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
January, 2004
117