HD404669 Datasheet, PDF (99/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
Registers Used by Comparator
• Compare enable register (CER: $018)
• Compare data register (CDR: $017)
Compare enable register (CER: $018): The compare enable register (CER) is a 3-bit write-only register
that selects comparator operation and the analog input pin (figure 77).
CER is reset by an MCU reset or in stop mode.
Compare enable register (CER: $018)
Bit
Initial value
Read/Write
Bit name
3
0
W
CER3
2
—
—
Not Used
1
0
W
CER1
0
0
W
CER0
CER1
0
1
CER0
0
1
×
Analog input pin selection
COMP₀
COMP₁
Not Used
CER3
0
1
Comparator operation selection
Comparator operation not selected: Digital input mode RD₀/COMP₀ and RD₁/COMP₁ pins
function as R port pins
Comparator operation selected: Analog input mode RD₀/COMP₀ and RD₁/COMP₁ pins
function as comparator pins
× : Don't care
Figure 77 Compare Enable Register (CER)
Compare data register (CDR: $017): The compare data register (CDR) is a 2-bit read-only register that
holds the result of the comparison between the analog input pin and the reference voltage (figure 78).
When comparator operation is started (CER3 is set to 1), the result of the comparison between the analog
input pin selected by the compare enable register (CER) and the reference voltage is read into the
corresponding bit of the compare data register (CDR). The value of the other bits in CDR is undetermined.
The CDR value is not retained after the comparator operation (when CER3 = 0), and is undetermined
except during comparator operation.
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