HD404669 Datasheet, PDF (82/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
If the state changes from transfer to another state, the serial 1 interrupt request flag (IFS1: $003, bit 2) is
set by the octal counter that is reset to 000.
• Continuous clock output state (only in internal clock mode): Continuous clock output state is entered
only in internal clock mode. In this state, the serial interface does not transmit/receive data but only
outputs the transmit clock from the SCK₁ pin.
When bits 1 and 0 (PMRA1, PMRA0) of port mode register A (PMRA: $004) are 00 in transmit clock
wait state and if the transmit clock is input (17), the serial interface enters continuous clock output state.
If serial mode register 1A (SM1A: $005) is written to in continuous clock output mode (18), STS wait
state is entered.
High/Low Control in Idle States: In idle states, that is, STS wait state and transmit clock wait state, the
output level of the SO₁ pin can be controlled by setting bit 1 (SM1B1) of serial mode register 1B (SM1B:
$028) to 0 or 1. The high/low control example is shown in figure 60. Note that the high/low level cannot
be controlled in transfer state.
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