HD404669 Datasheet, PDF (115/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
Direct Addressing Mode: A program can branch to any address in the ROM memory space by executing
the JMPL, BRL, or CALL instruction. Each of these instructions replaces the 14 program counter bits
(PC₁₃–PC₀) with 14-bit immediate data.
Current Page Addressing Mode: The MCU has 64 pages of ROM with 256 words per page. A program
can branch to any address in the current page by executing the BR instruction. This instruction replaces the
eight low-order bits of the program counter (PC₇–PC₀) with eight-bit immediate data. A branch by a BR
instruction located at a page boundary differs from other cases: see figure 88.
Zero-Page Addressing Mode: A program can branch to the zero-page subroutine area located at $0000–
$003F by executing the CAL instruction. When the CAL instruction is executed, 6 bits of immediate data
are placed in the six low-order bits of the program counter (PC₅–PC₀), and 0s are placed in the eight high-
order bits (PC₁₃–PC₆).
Table Data Addressing Mode: A program can branch to an address determined by the contents of four-bit
immediate data, the accumulator, and the B register by executing the TBR instruction.
P Instruction: ROM data addressed in table data addressing mode can be referenced with the P instruction
as shown in figure 88. If bit 8 of the ROM data is 1, the lower eight bits of ROM data are written to the
accumulator and the B register. If bit 9 is 1, the lower eight bits of ROM data are written to the R1 and R2
port output registers. If both bits 8 and 9 are 1, ROM data is written to the accumulator and the B register,
and also to the R1 and R2 port output registers at the same time.
The P instruction has no effect on the program counter.
Branch destination of a BR instruction on a page boundary: When a BR instruction is on a page
boundary (256n + 255), the program counter will advance to the next page because of the hardware
architecture. Therefore, when using a BR instruction on a page boundary, the branch destination should be
set in the next page (see figure 88).
HMCS400 Series cross assemblers are provided with an automatic paging function that automatically turns
the ROM page, irrespective of the model.
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