HD404669 Datasheet, PDF (19/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
W Register (W), X Register (X), and Y Register (Y): W is a 2-bit register and X and Y are 4-bit
registers. These registers are used in RAM register indirect addressing. The Y register is also used in D port
addressing.
SPX Register (SPX) and SPY Register (SPY): The SPX and SPY registers are 4-bit registers used to
supplement the X and Y registers.
Carry Flag (CA): CA is a 1-bit flag that stores ALU overflow generated by an arithmetic operation. CA is
set to 1 when an overflow is generated, and is cleared to 0 after operations in which no overflow occurred.
CA is also affected by the carry set/carry clear instructions (SEC and REC), and by the rotate with carry
instructions (ROTL and ROTR).
During interrupt handling, CA is saved on the stack, and is restored from the stack by the RTNI instruction.
(but is not affected by the RTN instruction)
Status Flag (ST): ST is a 1-bit flag that stores the results of arithmetic instructions, compare instructions,
and bit test instructions, and is used as the branch condition for the BR, BRL, CAL, and CALL conditional
branch instructions.
The contents of the ST flag are held until the next arithmetic, compare, bit test, or conditional branch
instruction is executed. After the execution of a conditional branch instruction, the value of ST is set to 1
without regard to the condition.
During interrupt handling, ST is saved on the stack, and is restored from the stack by the RTNI instruction.
(but is not affected by the RTN instruction)
Program Counter (PC): The PC is a 14-bit counter that indicates the ROM address of the next instruction
the CPU will execute.
Stack Pointer (SP): The SP is a 10-bit register that indicates the RAM address of the next stack frame in
the stack area.
The SP is initialized to $3FF by a reset. The SP is decremented by 4 by a subroutine call or by interrupt
handling, and is incremented by 4 when the saved data has been restored by a return instruction.
The upper 4 bits of the SP are fixed at 1111; the maximum number of stack levels is thus 16.
In addition to the reset method described above, the SP can also be initialized to $3FF by clearing the reset
stack pointer (RSP) in the interrupt control bits area with a RAM bit manipulation instruction, i.e., REM or
REMD.
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