HD404669 Datasheet, PDF (80/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
Table 20 Serial Transmit Clock (Prescaler Output)
SM1B
Bit 0
0
Bit 2
0
1
1
0
1
SM1A
Bit 1
0
1
0
0
1
0
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
Transmit Clock Division
Ratio
(ø_PER / 2048) ÷ 2
(ø_PER / 512) ÷ 2
(ø_PER / 128) ÷ 2
(ø_PER / 32) ÷ 2
(ø_PER / 8) ÷ 2
(ø_PER / 2) ÷ 2
(ø_PER / 2048) ÷ 4
(ø_PER / 512) ÷ 4
(ø_PER / 128) ÷ 4
(ø_PER / 32) ÷ 4
(ø_PER / 8) ÷ 4
(ø_PER / 2) ÷ 4
Transmit Clock Frequency
4096t_cyc
1024t_cyc
256t_cyc
64t_cyc
16t_cyc
4t_cyc
8192t_cyc
2048t_cyc
512t_cyc
128t_cyc
32t_cyc
8t_cyc
Operating States: The serial interface has the operating states shown in figure 59 in external clock mode
and internal clock mode.
STS wait state
Transmit clock wait state
Transfer state
Serial clock continuous output state (internal clock mode only)
• STS wait state: The serial interface enters STS wait state by MCU reset (00, 10 in figure 59). In STS
wait state, the serial interface is initialized and the transmit clock is ignored. If the STS instruction is
then executed (01, 11), the serial interface enters transmit clock wait state.
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