HD404669 Datasheet, PDF (119/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
Table 28 RAM Register Instructions
Operation
Mnemonic Operation Code
Function
Words/
Status Cycles
Load A from memory LAM(XY) 0 0 1 0 0 1 0 0 y x M → A
1/1
(X ↔ SPX, Y ↔ SPY)
Load A from memory LAMD d
0 1 1 0 0 1 0 0 0 0 M→A
2/2
d₉ d₈ d₇ d₆ d₅ d₄ d₃ d₂ d₁ d₀
Load B from memory LBM(XY) 0 0 0 1 0 0 0 0 y x M → B
1/1
(X ↔ SPX, Y ↔ SPY)
Load memory from A LMA(XY) 0 0 1 0 0 1 0 1 y x A → M
1/1
(X ↔ SPX, Y ↔ SPY)
Load memory from A LMAD d
0 1 1 0 0 1 0 1 0 0 A→M
2/2
d₉ d₈ d₇ d₆ d₅ d₄ d₃ d₂ d₁ d₀
Load memory from A, LMAIY(X) 0 0 0 1 0 1 0 0 0 x A → M, Y + 1 → Y
NZ
1/1
increment Y
(X ↔ SPX)
Load memory from A, LMADY(X) 0 0 1 1 0 1 0 0 0 x A → M, Y – 1 → Y
NB
1/1
decrement Y
(X ↔ SPX)
Exchange memory
XMA(XY) 0 0 1 0 0 0 0 0 y x M ↔ A
1/1
and A
(X ↔ SPX, Y ↔ SPY)
Exchange memory
XMAD d
0 1 1 0 0 0 0 0 0 0 M↔A
2/2
and A
d₉ d₈ d₇ d₆ d₅ d₄ d₃ d₂ d₁ d₀
Exchange memory
XMB(XY) 0 0 1 1 0 0 0 0 y x M ↔ B
1/1
and B
(X ↔ SPX, Y ↔ SPY)
Note: The meanings of (XY) and (X) are as follows:
Each instruction marked with (XY) has 4 mnemonics, each with different object codes. For example,
different values of x and y of the opcode of the LAM(XY) instruction are given below.
Mnemonic
y
x
Function
LAM
0
0
None
LAMX
0
1
X ↔ SPX
LAMY
1
0
Y ↔ SPY
LAMXY
1
1
X ↔ SPX, Y ↔ SPY
Each instruction marked with (X) has 2 mnemonics, each with different object codes. For example,
different values of x of the opcode of the LMAIY(X) instruction are given below.
Mnemonic
x
LMAIY
0
LMAIYX
1
Function
None
X ↔ SPX
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