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HD404669 Datasheet, PDF (45/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit
HD404669 Series
Input/Output
The MCU has 47 input/output pins (D0 to D5, D9 to D11, R00 to R43 and R60 to RA1) and 5 input pins (D12,
D13, RD0, RD1 and RE0). The features are described below.
• Four pins D0 to D3 are high source current (10 mA maximum) input/output pins.
• Five pins D4, D5, and D9 to D11 are high sink current (15 mA maximum) input/output pins.
• Certain of these input and output pins have shared functions with timers, the serial interface, and other
peripheral functions. The D12, D13, R0, R30, R32, R4, RD0, RD1 and RE0 pins are shared function pins.
The use of these pins as peripheral function pins takes precedence over their use as the D and R port
pins. Pins that are set to function as peripheral function pins are switched automatically between their
various functions and between the input and output directions according to their specifications under the
peripheral function setting.
• Input or output selection for input/output pins and port or peripheral function selection for multiplexed
pins are set by software.
• Peripheral function output pins are all CMOS outputs. However, the SO1 pin and the R43 port pin can be
set to function as NMOS open drain outputs by software.
• Since the MCU goes to the reset state internally after a reset and in stop mode, the peripheral function
settings for these pins are cleared. Furthermore, since the data control registers (DCD and DCR) are
also reset, the input/output pins go to the high-impedance state.
• The D0 to D3 pin circuits include pull-down MOS transistors, and all the other pin circuits include pull-
up MOS transistors. Note that the on/off states of the pull-up and pull-down MOS transistors can be set
independently of the setting for use as peripheral function pins.
I/O buffer configurations are shown in figures 27 and 28, and I/O pin circuit structures are listed in tables
14 and 15.
VCC
VCC
Pull-up MOS
Pull-up control signal
Buffer control signal
HLT
MIS3
DCD,DCR
Output data
Input data
Input control signal
PDR
Figure 27 I/O Buffer Configuration (with Pull-Up MOS)
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