HD404669 Datasheet, PDF (22/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
Item
Abbr.
Initial
Value
Contents
Timer/
counters,
serial
interface
Timer write register C (TWCU, L)
$X0
Refer to description of timer write register C
Timer write register D (TWDU, L)
$X0
Refer to description of timer write register D
Serial data register 1
(SR1U, L)
$XX
Refer to description of serial data register 1
Octal counter
(OC1)
000
Refer to description of serial interface
DTMF
Tone generator mode
register
(TGM)
0000
Refer to description of tone generator mode
register
Tone generator control (TGC)
register
000 -
Refer to description of tone generator control
register
Comparator Compare data register (CDR)
--XX
Refer to description of compare data register
Compare enable
register
(CER)
0-00
Refer to description of compare enable register
Bit registers Low speed on flag
(LSON)
0
Refer to description of operating modes
Watchdog timer on flag (WDON)
0
Refer to description of timer C
Direct transfer on flag (DTON)
0
Refer to description of operating modes
Input capture status flag (ICSF)
0
Refer to description of timer D
Input capture error flag (ICEF)
0
Refer to description of timer D
Others
Miscellaneous register (MIS)
0000
Refer to description of operating modes and
pull-up and pull-down MOS transistor control.
System clock select
(SSR12
000
register 1 bits 2 to 0
–SSR10)
Refer to description of internal oscillator circuit
and system clock select register 1 and 2
System clock select
register 2
(SSR2)
0000
Refer to description of internal oscillator circuit
and system clock select register 1 and 2
Bank register
(V)
- - -0
Refer to description of RAM memory map
Notes: 1. The statuses of other registers and flags after MCU reset are shown in the following table.
2. X indicates invalid value. – indicates that the bit does not exist.
Item
Carry flag
Abbr.
(CA)
Accumulator
(A)
B register
(B)
W register
(W)
X/SPX register
(X/SPX)
Y/SPY register
(Y/SPY)
RAM
RAM enable flag
(RAME)
Port mode
register C bit 2
(PMRC2)
System clock
(SSR13)
select register 1 bit 3
Status After Cancel-lation of Stop
Mode by STOPC Input
Pre-stop-mode values are not
guaranteed; values must be initialized
by program
Pre-stop-mode values are retained
1
Pre-stop-mode
values are retained
Status After all Other Types of Reset
Pre-MCU-reset values are not
guaranteed; values must be initialized
by program
0
0
22