HD404669 Datasheet, PDF (40/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

HD404669 Series
In figure 22(a), the level of the INT₀ signal is sampled by an interrupt frame. In (a) the sampled
value is low at point A, and also low at point B. Therefore, a falling edge is not detected. In (b),
the sampled value is high at point A, and also high at point B. A falling edge is not detected in
this case either.
When the MCU is in watch mode or subactive mode, keep the high level and low level period of
INT₀ longer than interrupt frame.
INT₀
Sampling
High
Low
Low
Figure 21 Edge Detection
INT₀
INT₀
Interrupt
frame
A: Low
B: Low
Interrupt
frame
A: High
B: High
(a) High level period
Figure 22 Sampling Example
(b) Low level period
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