HD404669 Datasheet, PDF (63/142 Pages) Hitachi Semiconductor – Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit

Toggle output waveform (timers C and D)
Free-running timer
HD404669 Series
256 clock cycles
Reload timer
256 clock cycles
(256 – N) clock cycles (256 – N) clock cycles
PWM output waveform (timers C and D)
T × (N + 1)
TMC13 = 0
TMD13 = 0
(free-running timer)
TMC13 = 1
TMD13 = 1
(reload timer)
T × 256
T
T × (256 – N)
Notes: T: Counter input clock period
The clock input source and division ratio are controlled by
timer mode register C1 and timer mode register D1.
N: Value in timer write register C or timer write register D
(When N = 255 (= $FF), PWM output is always fixed low.)
Figure 42 Timer Output Waveforms
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