MB86831 Datasheet, PDF (69/82 Pages) Fujitsu Component Limited. – 32-bit Embedded Controller

MB86830 Series
(7)Data Cache Invalidate Register (DCINVLD)[Wite only]
ASI = 0x0e
Capacity 16 KB
Bank 1:Address = 0x00008000H
Bank 2:Address = 0x80008000H
Other
Bank 1:Address = 0x00001000H
Bank 2:Address = 0x80001000H
bit→ 31
Reserved
bit 31 to bit 2
bit 1
bit 0
:Reserved [“0”Write]
:Cache LRU, Lock Bit Clear (Clear = 1, Not Clear = 0)
:Valid Bit Clear (Clear = 1, Not Clear = 0)
210
(8)Data Cache Data RAM(DCDATA)
bit→ 31
bit 31 to bit 0 :Data (RST = X)
X:Don’t care
ASI = 0x0f
Capacity 16 KB
Bank 1:Address = 0x00000000H to 0x00001ffcH (+4)
Bank 2:Address = 0x80000000H to 0x80001ffcH (+4)
Capacity 8 KB
Bank 1:Address = 0x00000000H to 0x00000ffcH (+4)
Bank 2:Address = 0x80000000H to 0x80000ffcH (+4)
Capacity 4 KB
Bank 1:Address = 0x00000000H to 0x000007fcH (+4)
Bank 2:Address = 0x80000000H to 0x800007fcH (+4)
Capacity 2 KB
Bank 1:Address = 0x00000000H to 0x000003fcH (+4)
Bank 2:Address = 0x80000000H to 0x800003fcH (+4)
Capacity 1 KB
Bank 2:Address = 0x80000000H to 0x800003fcH (+4)
0
Data
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