MB86831 Datasheet, PDF (52/82 Pages) Fujitsu Component Limited. – 32-bit Embedded Controller

MB86830 Series
s TIMING DIAGRAM
• Reset timing
CLKIN
RESET#
Longer than four clock cycle
Note : CLKIN is steady, and raise reset input "H", please after at least 100msec.
• Input/output timing 1
CLKIN
Input pins
Outpou pins
Input/output
pins
Setup
Hold
Setup
Hold
Input data
Valid delay
Valid delay
Hold
Output data
Hold
Input pins : BREQ#, BMACK#
Outpou pins : BE0# to BE1#, BE3#, CS0# to CS5#, SAMEPAGE#, LOCK#, OVF#, BGRNT#, PBREQ#, BMREQ#,
ERROR#, PDOWN#, RAS0# to RAS3#, CAS0# to CAS3#, DWE0# to DWE3#, DOE#
Input/output pins : D<31: 0>, ASI<3: 0>, RDWR#, BE2#
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