MB86831 Datasheet, PDF (61/82 Pages) Fujitsu Component Limited. – 32-bit Embedded Controller

MB86830 Series
controller also controls the RAS and CAS to place DRAM in the self-refresh mode when the processor enters the
sleep mode (low power consumption mode).
The MB86836 has no DRAM controller.
10. Interrupt Controller (IRC)
The interrupt controller (IRC) accepts interrupts inputs through eight channels, depending on the trigger mode and
mask bit set for each of the channels. When accepting an interrupt, the interrupt controller encodes it according
to the interrupt priority level and outputs the interrupt level to the processor. The interrupt level remains held unless
it is cleared by the processor. The processor is not therefore informed of the next interrupt.
11. Multiplier Circuit
The CLKSEL0, CLKSEL1, and CLKSEL2 pins can be used to select the multiplier circuit to be used. The ×1, ×2,
×3, ×4, or ×5 multiplier circuits are supported, which allow the processor to run faster.
12. IU (Integer Unit) Dedicated Registers (Not Memory Mapped)
(1)Processor Status Register (PSR)
bit→ 31 28 27
24 23
20 19
12 11
8 7 6 54
32
0
0 0 0 0H
1 1 1 1H
icc
nz vc
Reserved
PIL
S PS ET Reserved CWP
bit 23 to bit 20 :Integer condition code [icc] (n:Negative = 1, z:Zero = 1, v:Overflow = 1, c:Carry = 1)
bit 19 to bit 12 :Reserved[“0”Write, Don’t care for read]
bit 11 to bit 8 :Processor Interrupt Level [PIL] (Value = 1 to 15, RST = X)
bit 7
:Supervisor Mode [S] (Supervisor = 1, User = 0, RST = 1)
bit 6
:Prior S Mode [PS]
bit 5
:Enable Trap [ET] (Enable = 1, Disable = 0, RST = 0)
bit 4 to bit 3 :Reserved [“0”Write, Don’t care for read]
bit 2 to bit 0 :Current Window Point [CWP] (Value = 0 to 7, RST = X)
X:Don’t care
(2)Window Invalid Mask Register (WIM)
bit→ 31
Reserved
876543210
w7 w6 w5 w4 w3 w2 w1 w0
bit 31 to bit 8 :Reserved [“0”Write, Don’t care for read]
bit 7 to bit 0 :Window mask [w7 to w0] (Invalid = 1, Valid = 0, RST = X)
X:Don’t care
(3)Trap Base Register (TBR)
bit→ 31
TBA
bit 31 to bit 12 :Trap base address [TBA] (RST = X)
bit 11 to bit 4 :Trap type [tt] (RST = X)
X:Don’t care
12 11
tt
43
0
0000
61