MB86294 Datasheet, PDF (282/305 Pages) Fujitsu Component Limited. – Grraphiics Controller specifications

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
12.7 V 8 3 2 M o d e
1) When the XRDY pin is low, it is in the ready state.
2) Set the active level of DMAAK to high active in V832 mode.
3) DMA transfer supports the single transfer and demand transfer modes.
4) The XINT signal asserts high active signal. Set the V832-mode registers to high level trigger.
12.8 S P A R C l i t e
1) When the XRDY pin is low, it is in the ready state.
2) The SPARClite does not support the DMA transfer that issues the DREQ.
3) The XINT signal asserts low active signal.
12.9 S u p p o r t e d D M A T r a n s f e r M o d e s
Single address mode
SH3 Not supported
SH4
V832
Transfer performed in units of 32
bits or 32 bytes
Cycle steal mode and burst mode
supported
SPARC
lite
Dual address mode
Direct address transfer mode supported; indirect address
transfer mode not supported.
Transfer is performed in 32-bit units.
Cycle steal mode and burst mode supported.
Transfer is performed in 32-bit units. Transfer to
memory is performed in 32-byte units. Transfer to FIFO
not supported. Cycle steal mode and burst mode
supported.
Transfer is performed in 3 2-bit units.
Single transfer mode and demand transfer mode
supported.
MB86294/294S CORAL_LB
Graphics Controller
282
Specifications Rev. 1.0