MB86294 Datasheet, PDF (273/305 Pages) Fujitsu Component Limited. – Grraphiics Controller specifications

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
12.2.2 Timing of read access to different row addresses
MCLKO
TRAS
TRP
MRAS
MCAS
TRCD
TRCD
MWE
MA
ROW
MD
COL
CL
DATA
ROW
DQM
ROW: Row Address
COL: Column Address
DATA: READ DATA
TRAS: RAS Active Time
TRCD: RAS to CAS Delay Time
CL: CAS Latency
TRP: RAS Precharge Time
COL
CL
DATA
*Timing when CL2 operating
Fig. 10.20 Timing of Read Access to Different Row Addresses
The above timing diagram shows that read access is made from CORAL to different row addresses of
SDRAM. The first and next address to be read fall across an SDRAM page boundary, so the
Pre-charge command is issued at the timing satisfying TRAS, and then after the elapse of TRP, the
ACTV command is reissued, and then the READ command is issued.
MB86294/294S CORAL_LB
Graphics Controller
273
Specifications Rev. 1.0