MB86294 Datasheet, PDF (256/305 Pages) Fujitsu Component Limited. – Grraphiics Controller specifications

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
12 TIMING DIAGRAM
12.1 Host Interface
12.1.1 CPU read/write timing diagram in SH3 mode (Normally Not Ready
Mode)
( MODE[2:0]=000, RDY_MODE=0, BS_MODE=0)
T1 Tsw1 Thw1 T2 T1 Tsw1 Thw1 Thw2 Thw3 T2
BCLKI
A[24:2]
XCS
XBS
XRD
Hi-Z
D[31:0]
Valid Data
Valid Data
Hi-Z
XWE[3:0]
D[31:0]
Valid Data IN
Valid Data IN
XWAIT
Hi-Z
Hi-Z
Hi-Z
SoftWait HardWait NotWait
SoftWait HardWait HardWait HardWait Not Wait
¡: XWAIT sampling in SH3 mode
×: Soft Wait (1 cycle) in SH3 mode
T1: Read/write start cycle (XRDY in wait state)
Tsw*: Software wait insertion cycle (1 cycle setting)
Thw*: Hardware wait insertion cycle (XRDY cancels the wait state after the preparations)
T2: Read/write end cycle (XRDY ends in wait state)
Fig. 10.1 Read/Write Timing Diagram for SH3 (Normally Not Ready Mode)
MB86294/294S CORAL_LB
Graphics Controller
256
Specifications Rev. 1.0