MB86294 Datasheet, PDF (258/305 Pages) Fujitsu Component Limited. – Grraphiics Controller specifications

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
12.1.3 CPU read/write timing diagram in SH4 mode (Normally Not Ready
Mode)
( MODE[2:0]=001, RDY_MODE=0, BS_MODE=0)
T1 Tsw1 Thw1 T2
T1 Tsw1 Thw1 Thw2 Thw3 T2
BCLKI
A[24:2]
XCS
XBS
XRD
D[31:0]
XWE[3:0]
D[31:0]
XRDY
Hi-Z
Valid Data OUT
Valid Data OUT
Valid Data IN
Hi-Z
SoftWaiit HardWait Ready
Valid Data IN
Hi-Z
SoftWait HardWait HardWait HardWait Ready
¡ : XRDY sampling in SH4 mode
× : Soft Wait (1 cycle) in SH4 mode
T1: Read/write start cycle (XRDY in the not ready state)
Tsw*: Software wait insertion cycle (1 cycle)
Twh*: Hardware wait insertion cycle (XRDY asserts Ready after the preparations)
T2: Read/write end cycle (XRDY ends in not ready state)
Fig. 10.3 Read/Write Timing Diagram for SH4 Mode (Normally Not Ready Mode)
MB86294/294S CORAL_LB
Graphics Controller
258
Specifications Rev. 1.0