MB86293 Datasheet, PDF (263/285 Pages) Fujitsu Component Limited. – Grraphiics Conttrrollllerr Speciiffiicattiions

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
1) Enable the hardware wait for the areas to which CORAL is connected. When the normally not ready
mode (RDY_MODE = 0) is used, set the software wait count to “1”. When the normally ready mode
(RDY_MODE = 1) is used, set the count to “2”. When the normally ready mode is used
(RDY_MODE = 1) and BS_MODE = L, set the software wait to 2. When the normally ready mode is
enabled and BS_MODE = H, set the software wait to “3”.
2) When starting DMA by issuing an external request, do so after setting the transfer count register
(DTCR) and mode setting register (DSUR) of CORAL to the same value as the CPU setting. In the
dual DMA without ACK mode or V832 mode, there is no need to set DTCR.
3) When CORAL is read-/write-accessed from the CPU during DMA transfer, do not access the registers
and memories related to DMA transfer. If these registers and memories are accessed, reading and
writing of the correct value is not assured.
4) Set DREQ (DMARQ) to “Low” level detection.
5) Set the DACK/DRACK of SH to high active output, DMAAK of V832 to high active, and XTC of V832
to low active.
11.5 S H 3 M o d e
1) When the XRDY pin is low, it is in the wait state.
2) DMA transfer in the single-address mode is not supported.
3) DMA transfer in the dual-address mode supports the direct address transfer mode, but does not
support the indirect address transfer mode.
4) 16-byte DMA transfer in the dual-address mode is not supported.
5) The XINT signal asserts low active signal.
11.6 S H 4 M o d e
1) When the XRDY pin is low, it is in the ready state.
2) At DMA transfer in the single-address mode, transfer from the main memory (SH memory) to FIFO of
CORAL can be performed, but transfer from CORAL to the main memory cannot be performed.
3) DMA transfer in the single-address mode is performed in units of 32 bits or 32 bytes.
4) SH4-mode 32-byte DMA transfer in the dual-address mode supports inter-memory transfer, but does
not support transfer from memory to FIFO.
5) The XINT signal asserts low active signal.
MB86293 CORAL_LQ
Graphics Controller
263
Specifications Rev. 1.1