MB86293 Datasheet, PDF (190/285 Pages) Fujitsu Component Limited. – Grraphiics Conttrrollllerr Speciiffiicattiions

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
L0TC (L0 layer Transparency Control)
Register
address
DisplayBaseAddress + BCH
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name L0ZT
L0TC
R/W
RW
RW
Initial value 0
0
This register sets the transparent color for the L0 layer. Color set by this register is transparent in
blend mode. When L0TC = 0 and L0ZT = 0, color 0 is displayed in black (transparent).
This register corresponds to the CTC register for previous products.
Bit 14 to 0
L0TC (L0 layer Transparent Color)
Sets transparent color code for the L0 layer. In indirect color mode (8 bits/pixel) bits 7 to
0 are used.
Bit 15
L0ZT (L0 layer Zero Transparency)
Sets handling of color code 0 in L0 layer
0: Code 0 as transparency color
1: Code 0 as non-transparency color
L2TC (L2 layer Transparency Control)
Register
address
DisplayBaseAddress + C2H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name L2ZT
R/W
RW
L2TC
RW
Initial value 0
0
This register sets the transparent color for the L2 layer.
When L2TC = 0 and L2ZT = 0, color 0 is displayed in black (transparent).
This register corresponds to the MLTC register for previous products.
Bit 14 to 0
L2TC (L2 layer Transparent Color)
Sets transparent color code for the L2 layer. In indirect color mode (8 bits/pixel) bits 7 to
0 are used.
Bit 15
L2ZT (L2 layer Zero Transparency)
Sets handling of color code 0 in L2 layer
0 Code 0 as transparency color
1 Code 0 as non-transparency color
MB86293 CORAL_LQ
Graphics Controller
190
Specifications Rev. 1.1