MB86293 Datasheet, PDF (192/285 Pages) Fujitsu Component Limited. – Grraphiics Conttrrollllerr Speciiffiicattiions

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
L1ETC (L1 layer Extend Transparency Control)
Register
address
DisplayBaseAddress + 1A4H
Bit number 31 30 29 28 --- 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name L1ETZ Reserved
L1TEC
R/W
RW
R0
RW
Initial value 0
0
This register sets the transparent color for the L1 layer. When L1ETC = 0 and L1EZT = 0, color 0 is
displayed in black (transparent).
For YCbCr display, transparent color checking is not performed; processing is always performed
assuming that transparent color is not used.
Bit 23 to 0
L1ETC (L1 layer Extend Transparent Color)
Sets transparent color code for the L1 layer. In indirect color mode (8 bits/pixel) bits 7 to
0 are used.
Bit 31
L1EZT (L1 layer Extend Zero Transparency)
Sets handling of color code 0 in L1 layer
0 Code 0 as transparency color
1 Code 0 as non-transparency color
L2ETC (L2 layer Extend Transparency Control)
Register
address
DisplayBaseAddress + 1A8H
Bit number 31 30 29 28 --- 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name L2ETZ Reserved
L2TEC
R/W
RW
R0
RW
Initial value 0
0
This register sets the transparent color for the L2 layer. The 24 bits/pixel transparent color is set
using this register. The lower 15 bits of this register are physically the same as L2TC. Also, L2ETZ is
physically the same as L2TZ.
When L2ETC = 0 and L2EZT = 0, color 0 is displayed in black (transparent).
Bit 23 to 0
L2ETC (L2 layer Extend Transparent Color)
Sets transparent color code for the L2 layer. In indirect color mode (8 bits/pixel) bits 7 to
0 are used.
Bit 31
L2EZT (L2 layer Extend Zero Transparency)
Sets handling of color code 0 in L2 layer
0 Code 0 as transparency color
1 Code 0 as non-transparency color
MB86293 CORAL_LQ
Graphics Controller
192
Specifications Rev. 1.1