MB86293 Datasheet, PDF (156/285 Pages) Fujitsu Component Limited. – Grraphiics Conttrrollllerr Speciiffiicattiions

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
VSW (Vertical Synchronize pulse Width)
Register
address
DisplayBaseAddress + 0FH
Bit number
7
6
5
4
3
2
1
0
Bit field name
Reserved
VSW
R/W
R0
RW
Initial value
0
Don’t care
This register controls the pulse width of vertical synchronization signal in unit of raster. Setting value
+ 1 is the pulse width raster count.
VTR (Vertical Total Rasters)
Register
address
DisplayBaseAddress + 12H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
VTR
R/W
R0
RW
Initial value
0
Don’t care
This register controls the vertical total raster count. Setting value + 1 is the total raster count. For
the interlace display, Setting value + 1.5 is the total raster count for 1 field; 2 × setting value + 3 is the
total raster count for 1 frame (see Section 8.3.2).
VSP (Vertical Synchronize pulse Position)
Register
address
DisplayBaseAddress + 14H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
VSP
R/W
R0
RW
Initial value
0
Don’t care
This register controls the pulse position of vertical synchronization signal in unit of raster. The vertical
synchronization pulse is asserted starting at the setting value + 1st raster relative to the display start
raster.
VDP (Vertical Display Period)
Register
address
DisplayBaseAddress + 16H
Bit number 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit field name
Reserved
VDP
R/W
R0
RW
Initial value
0
Don’t care
This register controls the vertical display period in unit of raster. Setting value + 1 is the count of
raster to be displayed.
MB86293 CORAL_LQ
Graphics Controller
156
Specifications Rev. 1.1