MB86293 Datasheet, PDF (241/285 Pages) Fujitsu Component Limited. – Grraphiics Conttrrollllerr Speciiffiicattiions

FUJITSU LIMITED
PRELIMINARY and CONFIDENTIAL
11.1.4 CPU read/write timing diagram in SH4 mode (Normally Ready Mode)
( MODE[2:0]=001, RDY_MODE=1, BS_MODE=0)
T1 Tsw1 Tsw2 T2
T1 Tsw1 Tsw2 Thw1 Thw2 T2
BCLKI
A[24:2]
XCS
XBS
XRD
Hi-Z
D[31:0]
Valid Data OUT
Valid Data OUT
XWE[3:0]
D[31:0]
Valid Data IN
Valid Data IN
XRDY
Hi-Z
Hi-Z
SoftWaiit SoftWait Ready
SoftWait SoftWait HardWait HardWait Ready
¡ : XRDY sampling in SH4 mode
× : Soft Wait (2 cycles) in SH4 mode
T1: Read/write start cycle (XRDY in ready state)
Tsw*: Software wait insertion cycle (2-cycle setting required)
Twh*: Hardware wait insertion cycle (XRDY asserts Ready after the preparations)
T2: Read/write end cycle (XRDY ends in ready state.)
Fig. 10.4 CPU Read/Write Timing Diagram for SH4 Mode (Normally Ready Mode)
MB86293 CORAL_LQ
Graphics Controller
241
Specifications Rev. 1.1