MC9S12UF32 Datasheet, PDF (90/128 Pages) Freescale Semiconductor, Inc – System on a Chip Guide V01.05

System on a Chip Guide — 9S12UF32DGV1/D V01.05
10.1 Device-specific information
The FTS32K is part of the HCS12 Bus domain.
The register spaces for the FTS32K is located at addresses $0100-$010F.
The memory spaces for the FTS32K is located at addresses $8000-$FFFF upon reset. Addresses
$4000-$7FFF also map to the same flash array at $8000-$BFFF.
Section 11 Integrated Queue Controller (IQUE) Block
Description
Consult the IQUE Block Guide for information about the Integrated Queue Controller module.
11.1 Device-specific information
The IQUE is part of the IQUE Bus domain, with the QRAM interface in HCS12 Bus domain.
The register spaces for the IQUE is located at addresses $0200-$023F.
The memory spaces for the IQUE is located at addresses $0000-$07FF ($0600-$07FF is reserved) upon
reset and is mappable to any 2k-byte boundary.
The Channel Request Mapping for the IQUE module on the UF32 is shown in Table 11-1.
Table 11-1 Queue Channel n Request Mapping
QnREQ
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
Peripheral Function
USB20D6E2F
USB20D6E2F
ATA5HC
ATA5HC
CFHC
CFHC
MSHC
MSHC
SDHC
SDHC
SMHC
SMHC
Direction (Rx/Tx)
Rx
Tx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
Tx
Rx
Tx
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