MC9S12UF32 Datasheet, PDF (25/128 Pages) Freescale Semiconductor, Inc – System on a Chip Guide V01.05

System on a Chip Guide — 9S12UF32DGV1/D V01.05
Table 1-1 Device Memory Map
$1800 - $3FFF
$4000 - $7FFF
$8000 - $BFFF
$C000 - $FFFF
Reserved
16K-byte Flash EEPROM Array (addresses valid only when
ROMHM=0 of register MISC)
16K-byte Paged Window
16K-byte Flash EEPROM Array
10240
16384
16384
16384
PPAGE,
MISC
NOTES:
1. QRAM starting address is controlled by INITEE register and QRAM has the same priority as EEPROM mem-
ory block. For details about signal priority, please refer to HCS12 MMC Block Guide.
$0000
$0400
$1000
$17FF
$2000
$37FF
$0000 1K Register Space
$03FF
$1000
$17FF
Mappable to any 2K Boundary
1.5K QRAM Space plus
0.5K Reserved Space
Mappable to any 2K Boundary
$2000
$37FF
1K Bytes 16-bit RAM plus
2.5K Bytes configurable RAM (see SMRAM)
Mappable to any 8K Boundary
$8000
EXT
$C000
$8000
32K Fixed Flash EEPROM
$FF00
$FFFF
VECTORS
NORMAL
SINGLE CHIP
MISC = $0F
VECTORS
EXPANDED
MISC = $0E
VECTORS
SPECIAL
SINGLE CHIP
MISC = $0F
$FFFF
$FF00
$FFFF
BDM
(If Active)
The figure shows an example of an application memory map with the following register setting.
This is not the map out of reset.
INITRG = $00
INITRM = $20
INITEE = $11
PPAGE = $3E
Figure 1-2 MC9S12UF32 Memory Map (Application Example)
Freescale Semiconductor
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