MC9S12UF32 Datasheet, PDF (61/128 Pages) Freescale Semiconductor, Inc – System on a Chip Guide V01.05

System on a Chip Guide — 9S12UF32DGV1/D V01.05
2.4.26 PJ1 / MSSDIO - Port J I/O Pin 1
PJ1 is a general purpose input or output pin. When the MSHC module is enabled it becomes the serial data
line (MSSDIO) for the MSHC module. While in reset and immediately out of reset the PJ1 pin is
configured as a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9UF32 Block
Guide and the MSHC Block Guide for information about pin configurations.
2.4.27 PJ0 / MSBS - Port J I/O Pin 0
PJ0 is a general purpose input or output pin. When the MSHC module is enabled it becomes the bus state
line (MSBS) for the MSHC module. While in reset and immediately out of reset the PJ0 pin is configured
as a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9UF32 Block Guide and
the MSHC Block Guide for information about pin configurations.
2.4.28 PM[5:2] / SDDATA[3:0] - Port M I/O Pin [5:2]
PM[5:2] are general purpose input or output pins. When the SDHC module is enabled they become the
data line (SDDATA[3:0]) for the SDHC module. While in reset and immediately out of reset the PM[5:2]
pins are configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide and the SDHC Block Guide for information about pin configurations.
2.4.29 PM1 / SDCLK — Port M I/O Pin 1
PM1 is a general purpose input or output pin. When the SDHC module is enabled the PM1 pin is
configured as the SDCLK of the SDHC module. While in reset and immediately out of reset the PM1 pin
is configured as a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9UF32
Block Guide and the SDHC Block Guide for information about pin configurations.
2.4.30 PM0 / SDCMD — Port M I/O Pin 0
PM0 is a general purpose input or output pin. When the SDHC module is enabled the PM0 pin is
configured as the SDCMD of the SDHC module. While in reset and immediately out of reset the PM0 pin
is configured as a high impedance input pin. Consult the Port Integration Module (PIM) PIM_9UF32
Block Guide and the SDHC Block Guide for information about pin configurations.
2.4.31 PP7 / SRE / ACFD15 / AATAD15— Port P I/O Pin 7
PP7 are general purpose input or output pin. When enabled in the SMHC module, the PP7 pin becomes
the read enable pin, SRE. When the SMHC is not enabled, it can be configured in the PIM module to
become the alternate data pins for CFHC or ATA5HC in place of PA7. While in reset and immediately out
of reset PP7 pin is configured as a high impedance input pin. Consult the Port Integration Module (PIM)
PIM_9UF32 Block Guide, the CFHC Block Guide, the ATA5HC Block Guide and the MSHC Block
Guide for information about pin configurations.
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