MC9S12UF32 Datasheet, PDF (89/128 Pages) Freescale Semiconductor, Inc – System on a Chip Guide V01.05

System on a Chip Guide — 9S12UF32DGV1/D V01.05
7.1 Device-specific information
The ATA5HC is part of the IQUE bus domain.
The register spaces for the ATA5HC is located at addresses $01C0-$01FF.
Section 8 Compact Flash Host Controller (CFHC) Block
Description
Consult the CFHC Block Guide for information about the Compact Flash host controller module.
8.1 Device-specific information
The CFHC is part of the IQUE bus domain.
The register spaces for the CFHC is located at addresses $0280-$029F.
The module inputs CD1, CD2, CVCC, SPKR, STSCHG, VS1, VS2 and the module output CRESET are
not used in MC9S12UF32 (i.e. not connected to chip I/O pins) and are internally tied to constant values.
User can use GPIO pins for these CF card interface if necessary.
Section 9 Clock Reset Generator (CRG_U) Block
Description
Consult the CRG_U Block Guide for information about the Clock and Reset Generator module.
9.1 Device-specific information
The CRG_U is part of the IPBus domain.
The register space for the CRG_U is located at addresses $0034-$003F.
Section 10 Flash EEPROM 32K (FTS32K) Block Description
Consult the FTS32K Block Guide for information about the 32K Flash EEPROM module.
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