MC68HC05X16 Datasheet, PDF (75/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
RIF — Receive interrupt flag
The RIF bit is set by the MCAN when a new message is available in the receive buffer, and the RIE
bit in CCNTRL is set. At the same time RBS is set. Like all the bits in this register, RIF is cleared
by reading the register, or when reset request is set.
1 (set) – A new message is available in the receive buffer.
0 (clear) – No receive interrupt has occurred.
5.3.5 MCAN acceptance code register (CACC)
On reception each message is written into the current receive buffer. The MCU is only signalled to
read the message however, if it passes the criteria in the acceptance code and acceptance mask
5
registers (accepted); otherwise, the message will be overwritten by the next message (dropped).
Note:
This register can only be accessed when the reset request bit in the CCNTRL register
is set.
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
MCAN acceptance code (CACC) $0024 AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Undefined
AC7 – AC0 — Acceptance code bits
AC7 – AC0 comprise a user defined sequence of bits with which the 8 most significant bits of the
data identifier (ID10 – ID3) are compared. The result of this comparison is then masked with the
acceptance mask register. Once a message has passed the acceptance criterion the respective
identifier, data length code and data are sequentially stored in a receive buffer, providing there is
one free. If there is no free buffer, the data overrun condition will be signalled.
On acceptance the receive buffer status bit is set to full and the receive interrupt bit is set (provided
RIE = enabled).
MC68HC05X16
MOTOROLA CAN MODULE (MCAN)
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