MC68HC05X16 Datasheet, PDF (185/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
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MC68HC705X32
Important note
The following applies to the D59J MC68HC705X32 mask set only.
– A mask option register (MOR) on the MC68HC705X32 allows
the customer to select POR delay cycles and oscillator DIV
ratio. However, during reset, options of 4064 cycles POR and
DIV10 are forced, regardless of which options the customer has
selected. Therefore, a power-on reset delay of 40640 oscillator
cycles is forced.
On the D59J mask set, the oscillator divide ratio depends on the CANE pin:
CANE = 1 DIV10 forced in bootloader mode
CANE = 0 DIV2 forced in bootloader mode
On later mask set revisions, including G47V, DIV2 is forced in bootloader mode,
regardless of the CANE pin.
The following applies to the D40J and D59J MC68HC705X32 mask sets only:
– The minimum external RESET input pulse width, t_RL
(Table B-10) is 1.5 t_CYC
– Maximum bus speed 2.2 MHz
The MC68HC705X32 is a device similar to the MC68HC05X16, but with 32K bytes of EPROM
instead of 16K bytes of ROM. In addition, the bootstrap routines available in the MC68HC05X16
are replaced by bootstrap routines specific to the MC68HC705X32. The entire MC68HC05X16
data sheet applies to the MC68HC705X32, with the exceptions outlined in this appendix.
MC68HC05X16
MC68HC705X32
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