MC68HC05X16 Datasheet, PDF (71/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
frame sequence (11 recessive bits). The designer must take this into consideration
when planning to use the sleep command.
COS — Clear overrun status
1 (set) – This clears the read-only data overrun status bit in the CSTAT register
(see Section 5.3.3). It may be written at the same time as RRB.
0 (clear) – No action.
RRB — Release receive buffer
When set this releases the receive buffer currently attached to the CPU, allowing the buffer to be
reused by the MCAN. This may result in another message being received, which could cause
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another receive interrupt request (if RIE is set). This bit is cleared automatically when a message
is received, i.e. when the RS bit (see Section 5.3.3) becomes set.
1 (set) – Released – receive buffer is available to the MCAN.
0 (clear) – No action.
AT — Abort transmission
When this bit is set a pending transmission will be cancelled if it is not already in progress, allowing
the transmit buffer to be loaded with a new (higher priority) message when the buffer is released.
If the CPU tries to write to the buffer when it is locked, the information will be lost without being
signalled. The status register can be checked to see if transmission was aborted or is still in
progress.
1 (set) – Present – Abort transmission of any pending messages.
0 (clear) – No action.
TR — Transmission request
1 (set) – Present – Depending on the transmission buffer’s content, a data
frame or a remote frame will be transmitted.
0 (clear) – No action. This will not cancel a previously requested transmission;
the abort transmission command must be used to do this.
MC68HC05X16
MOTOROLA CAN MODULE (MCAN)
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