MC68HC05X16 Datasheet, PDF (122/232 Pages) Freescale Semiconductor, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Freescale Semiconductor, Inc.
7.12
Baud rate selection
The flexibility of the baud rate generator allows many different baud rates to be selected, depending
on the CPU clock frequency. A particular baud rate may be generated by manipulating the various
prescaler and division ratio bits. Table 7-6, Table 7-7 and Table 7-8 show the highest baud rates that
can be achieved for five typical crystal frequencies, for each of the CPU clock frequency options and
only using the prescaler bits. Table 7-9 shows how lower transmitter or receiver baud rates may be
obtained using a further division ratio provided by the SCI rate select bits. Note that the five
examples given in Table 7-9 are representative samples only.
Table 7-6 SCI baud rate selection with CPU clock frequency = f_OSC/2
SCP1
Clock
Crystal frequency – f_osc (MHz)
divided
SCP0 _by 4.194304 4.00
2.4576
2.00
1.8432
0
0
1 131072 125000 76800 62500 57600
0
1
3
43691 41667 25600 20833 19200
7
1
0
4
32768 31250 19200 15625 14400
1
1
13 10082 9600
5907
4800
4430
Table 7-7 SCI baud rate selection with CPU clock frequency = f_OSC/8
SCP1
0
0
1
1
SCP0
0
1
0
1
Clock
divided
by
1
3
4
13
16.00
125000
41667
31250
9600
Crystal frequency – f_osc (MHz)
8.00 4.9152 4.194304
62500
20833
15625
4800
38400
12800
9600
2954
32768
10082
8192
2521
2.4576
19200
14400
4430
1477
Table 7-8 SCI baud rate selection with CPU clock frequency = f_OSC/10
SCP1
0
0
1
1
SCP0
0
1
0
1
Clock
divided
by
1
3
4
13
20.00
125000
41667
31250
9600
Crystal frequency – f_osc (MHz)
18.432 10.00 6.144
115200
38400
28800
8861
62500
20833
15625
4800
38400
12800
9600
2954
5.0
31250
10417
7813
2400
Note: The clock in the ‘Clock divided by’ column refers to the internal processor clock.
SERIAL COMMUNICATIONS INTERFACE
MC68HC05X16
For More Information On This Product,
Rev. 1
Go to: www.freescale.com